Power dissipation in circuits is a concern of integrated circuit (IC) designers and manufacturers. One of the effects of higher densities of devices (e.g., transistors) on chips is that more heat is being generated. Often, such increases in heat require improvements in cooling, which are costly to implement.
Currently, most integrated circuits are optimized to achieve high operational speeds. During the design process, computer aided design tools are utilized to design, simulate, and analyze circuits. Typically, all of the components of the IC and interconnections between the components are described in a netlist. Timing analysis tools utilize the netlist to simulate the propagation of signals through the various paths of the design, such that timing of the circuit can be analyzed and optimized. In performing conventional timing analysis, the time for a signal to propagate along a path is measured. When the actual arrival time of the signal at a point differs from the required arrival time of the signal at the same point, there is said to be slack. Positive slack implies that the signal traveled faster than required, while negative slack means that the signal traveled slower than desired.
One such method for analysis and optimization is the hierarchical design methodology in which the circuit is partitioned into macros. Relationships between respective macros are defined by timing assertions, which are constraints between the macros that operate to maintain overall timing and functionality of the circuit. For example, timing assertions commonly define a time at which an input signal arrives at a pin of a macro, a time at which an output signal is required at a pin of a macro, the external capacitive load driven by the outputs, etc. Optimization typically involves altering the design of a macro (e.g., logic re-structuring, layout of the components, buffer insertion, transistor sizing, etc.) to comply with the timing assertions. However, conventional timing assertions normally focus only on timing, without tuning the circuit for power.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.